amazon.co.ukComputer Systems and Architecture
A-Level Computer Science revision: Computer Systems and Architecture. Learning objectives, key points, worked examples and practice questions across AQA, Edexcel, OCR, WJEC and CCEA.
📌 Key Points
Key Fact: CPU: ALU (arithmetic/logic), CU (control signals), Registers: PC (next instruction), ACC (results), MAR (address), MDR (data), CIR (instruction), SR (flags)
Key Fact: FDE: Fetch (PC to MAR, memory to MDR/CIR, PC++), Decode (CU interprets CIR), Execute (ALU/control)
Key Fact: Pipelining: fetch/decode/execute overlap; hazards (data, control, structural)
Key Fact: Memory: Registers > L1 cache > L2 > L3 > RAM > SSD > HDD; Virtual memory: paging, page table, TLB, page fault
Key Fact: CISC: complex instructions, variable length, microcode; RISC: simple, fixed length, load/store, more registers
Key Fact: Parallel: SIMD (single instruction, multiple data), MIMD (multicore); Amdahl: speedup = 1/((1-p) + p/n)
🎯 Learning Objectives
- Explain CPU architecture: ALU, CU, registers (PC, ACC, MAR, MDR, CIR, SR)
- Describe fetch-decode-execute cycle and pipelining
- Understand memory hierarchy: registers, cache (L1/L2/L3), RAM, virtual memory, secondary storage
- Compare CISC vs RISC, parallel processing (SIMD, MIMD, multicore)
- Understand instruction sets: addressing modes, instruction formats, assembly basics
- Analyse performance: clock speed, CPI, IPC, Amdahl's law
💡 Worked Example
Exam-Style Question
Question: A program has 20 percent serial code. Max speedup on 4 cores?
Model Answer:
Amdahl: speedup = 1/((1-0.8) + 0.8/4) = 1/(0.2 + 0.2) = 2.5x. Even infinite cores: 1/0.2 = 5x
❓ Practice Questions
Model answers are being added progressively - questions marked ✗ don't have one yet. Cross-check with your teacher or the official mark scheme.
Questions:
- List registers and their purposes✗ answer coming soon
- Draw FDE cycle diagram✗ answer coming soon
- Explain cache hit/miss✗ answer coming soon
- Compare CISC vs RISC✗ answer coming soon
- Calculate speedup: 30 percent serial, 8 cores✗ answer coming soon
🎬 Video Resources
- Computer Systems and Architecture - Overview -- YouTube Search
- Computer Systems and Architecture - Exam Questions -- YouTube Search
📄 Past Papers & Exam Resources
🔗 Further Reading & Resources
- Physics & Maths Tutor - Computer Systems and Architecture -- Free notes, worksheets, and past paper questions by topic
- Dr Frost Maths - Computer Systems and Architecture -- Free resources, slides, and interactive questions
- BBC Bitesize - Computer Systems and Architecture -- BBC Bitesize revision resources
📚 Lesson Plan (50 minutes)
- Starter (5 min): Recall prior knowledge of computer systems and architecture with quick questions.
- Teaching (15 min): Work through each of the learning objectives, explaining principles step by step.
- Key points review (5 min): Revisit the key points together, confirming understanding.
- Worked example (10 min): Model the example question: A program has 20 percent serial code. Max speedup on 4 cores?. Solution: Amdahl: speedup = 1/((1-0.8) + 0.8/4) = 1/(0.2 + 0.2) = 2.5x. Even infinite cores: 1/0.2 = 5x
- Practice (10 min): Students attempt the practice questions independently; circulate and support.
- Plenary (5 min): Review answers and address misconceptions.
🏠 Homework
- List registers and their purposes
- Draw FDE cycle diagram
- Explain cache hit/miss
- Compare CISC vs RISC
- Calculate speedup: 30 percent serial, 8 cores
🧾 Assessment
Check practice answers against the model answer; use the built-in practice questions as formative assessment.