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combinational logic systems

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4 detailed 50-minute lessons with teaching scripts, worked examples, parent guides, and assessment criteria.

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Lesson Overview

Total Lessons: 4
Tier: Foundation and Higher
Duration: 50 minutes per lesson (200 minutes total)
Exam Boards: AQA, Edexcel, OCR, Eduqas, CCEA

Learning Objectives

Prerequisites

Materials & Equipment

Lesson 1: Introduction: combinational logic systems

Duration: 50 minutes

Starter Activity (5 minutes)

Quick Recall

Write down everything you already know about combinational logic systems. Then check against the key terms: key terms from combinational logic systems. Use a mini-whiteboard or paper.

Main Content (35 minutes)

Parent/Teacher Guide:
Before lesson: Read the script below. Pre-teach key vocab: key terms from combinational logic systems.
If stuck: Re-read the revision notes (link above), then break the content into smaller steps.
Extension: See the Stretch & Challenge ideas in Lesson 4.
Teaching Script (35 mins):
Mins 0-5 - Hook: "Today: combinational logic systems. By the end you will be able to answer exam questions on it unaided. It connects to the rest of Electronics because the ideas here recur across the spec."
Mins 5-20 - Direct Instruction: Work through the core ideas below one at a time; after each, ask your student to explain it back in their own words.
Mins 20-30 - Guided Practice: Model the worked example together, then let your student attempt the first practice question with guidance.
Mins 30-35 - Independent Practice: 2-3 practice questions from Lesson 3 below, with immediate feedback.
First Look

Start with the revision notes summary, then attempt: explain the key ideas of combinational logic systems

Plenary (5 minutes)

Check Out

Your student states one thing they learned and one question they still have about combinational logic systems.

Lesson 2: Core Concepts: combinational logic systems

Duration: 50 minutes

Starter Activity (5 minutes)

Review Previous Lesson

Quick recap: write 3 key points from Lesson 1 on combinational logic systems. Check them against the notes below.

Main Content (35 minutes)

Key Fact: Combinational logic produces outputs determined solely by current inputs, with no memory or feedback.
Key Fact: A half adder adds two single-bit binary numbers, producing Sum (XOR) and Carry (AND).
Key Fact: A full adder adds three bits (two inputs plus carry-in), producing Sum and Carry-out using two half adders and an OR gate.
Key Fact: Sum = A ⊕ B ⊕ C_in; Carry-out = A·B + C_in·(A ⊕ B).
Key Fact: Multiple full adders can be cascaded to build multi-bit ripple-carry adders.
Key Fact: A multiplexer (MUX) selects one of several inputs and routes it to a single output, controlled by select lines.

Practice (10 minutes)

Q: explain the key ideas of combinational logic systems

Answer:

Plenary (5 minutes)

Explain Back

Your student teaches the key points back to you without looking. Fill any gaps immediately.

Lesson 3: Application: combinational logic systems

Duration: 50 minutes

Starter Activity (5 minutes)

Quick Recall

Recall the key terms: key terms from combinational logic systems. Define each in one sentence.

Main Content (35 minutes)

Parent/Teacher Guide: Let your student attempt each question alone first, then compare with the model answer. Award method marks for correct working even if the final answer is wrong.

Work through the practice questions on the revision notes page for this topic.

Plenary (5 minutes)

Error Review

Review any questions answered incorrectly. Identify whether the error was knowledge, method, or reading the question.

Lesson 4: Exam Practice: combinational logic systems

Duration: 50 minutes

Starter Activity (5 minutes)

Command Words

Review what these command words require: state (one point), describe (say what happens), explain (say why), compare (both sides), evaluate (judgement).

Main Content (35 minutes)

Extended Answer

Extended question: Full-Mark Response Describe the structure and operation of a full adder, and explain how multiple full adders are combined to create a multi-bit adder. <div class="

A full adder adds three single-bit inputs: A, B and a carry-in (C_in), producing a Sum and Carry-out. The Sum is computed as A ⊕ B ⊕ C_in using two XOR gates. The Carry-out is A·B + C_in·(A ⊕ B), requiring two AND gates and one OR gate. A full adder can be built from two half adders and an OR gate: the first half adder adds A and B to give a partial sum and carry, the second half adder adds the partial sum to C_in, and the OR gate combines the two carry signals. To build a multi-bit (e.g. 4-bit) ripple-carry adder, four full adders are cascaded: the carry-out of each stage connects to the carry-in of the next. The least significant full adder has its C_in set to 0. The result is computed bit by bit, with carries rippling from right to left. This ripple propagation introduces delay — the worst case is when a carry must propagate through all stages — which limits the speed of large adders.

Exam Tips: When analysing a combinational circuit, work from inputs to outputs, writing expressions at each gate. | For adder questions, clearly state Sum and Carry expressions separately. | Remember: a half adder cannot handle carry-in; always use a full adder when carry propagation is needed. | For MUX questions, identify the number of select lines: n = log₂(number of data inputs). | Build truth tables for combinational circuits by evaluating each gate step by step.
Common Errors: ✗ Using a half adder where a carry-in from a previous stage is required. ✓ Use a full adder when there is a carry-in input; half adders only work for the least significant bit. ✗ Confusing multiplexer and decoder functions. ✓ A multiplexer selects one input from many to route to an output; a decoder activates one output from many based on a binary input. ✗ Forgetting carry propagation delay in ripple-carry adders. ✓ Each full adder must wait for the carry from the previous stage, creating a ripple delay proportional to the number of bits. ✗ Omitting the OR gate that combines carry terms in a full adder. ✓ Carry-out = A·B + C_in·(A ⊕ B); the two carry terms are combined with an OR gate.
Stretch & Challenge (Grade 8-9):
  • Synoptic links: explain how combinational logic systems connects to another Electronics topic you have studied
  • Real-world: research one real-world use or example of combinational logic systems
  • Critical: "What are the limitations of the models used in combinational logic systems?"

Plenary (5 minutes)

Assessment Criteria
  • Got it: Confident explanation + correct worked examples
  • Getting there: Main points OK, needs support with detail
  • Not yet: Confused on key concepts - re-run Lesson 2

Homework & Consolidation

Recommended Resources

🎓 Smart Lesson (Guided)